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https://github.com/dimoniche/solarium.git
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Dmitriy
0879180e90
P0.23 MK_P9 IMPULSE OUTPUT (импульсный выход монетоприемника) И надо в программе MK_P9 заменить на P0.25 MK_P7 А мы на плате замкнем эти 2 ноги, одна из которых итак не работает.
179 lines
3.6 KiB
C
179 lines
3.6 KiB
C
#include "iolpc2368.h"
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#include "ucos_ii.h"
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#include "cpu.h"
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#include "app_serv.h"
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#include "coin.h"
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#include "data.h"
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#include "datadesc.h"
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#include "modem.h"
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OS_STK CoinTaskStk[COIN_TASK_STK_SIZE];
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void InitImpInput(void);
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CPU_INT32U CoinImpCounter;
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CPU_INT08U coin_enabled;
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void CoinTask(void *p_arg)
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{
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while(1)
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{
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CPU_INT32U enable_coin;
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OSTimeDly(100);
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GetData(&EnableCoinDesc, &enable_coin, 0, DATA_FLAG_SYSTEM_INDEX);
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if (enable_coin && coin_enabled)
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{
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// äëÿ ðàçðåøåíèÿ ìîíåòíèêà âûñòàâèì íèçêèé óðîâåíü
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FIO0CLR_bit.P0_24 = 1;
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if (GetCoinCount())
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{
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PostUserEvent(EVENT_COIN_INSERTED);
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}
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}
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else
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{
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// äëÿ çàïðåòà ìîíåòíèêà âûñòàâèì âûñîêèé óðîâåíü
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FIO0SET_bit.P0_24 = 1;
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CoinDisable();
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GetResetCoinCount();
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}
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}
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}
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void CoinDisable(void)
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{
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coin_enabled = 0;
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}
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void CoinEnable(void)
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{
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coin_enabled = 1;
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}
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// ïîëó÷èòü ÷èñëî ìîíåò
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CPU_INT32U GetCoinCount(void)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CoinImpCounter;
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// ïîëó÷èòü ÷èñëî ìîíåò è ñáðîñèòü ñ÷åò÷èê
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CPU_INT32U GetResetCoinCount(void)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CoinImpCounter;
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CoinImpCounter = 0;
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// èíèöèàëèçàöèÿ ìîíåòîïðèåìíèêà
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void InitCoin(void)
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{
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CoinImpCounter = 0;
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coin_enabled = 0;
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InitImpInput();
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OSTaskCreate(CoinTask, (void *)0, (OS_STK *)&CoinTaskStk[COIN_TASK_STK_SIZE-1], COIN_TASK_PRIO);
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}
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void InputCapture_ISR(void)
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{
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CPU_INT08U ir = T3IR;
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static CPU_INT32U period = 0;
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T3IR = 0xFF;
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if (ir & 0x10)
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{// CR0 interrupt
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if (FIO0PIN_bit.P0_25)
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{// ïðèøåë çàäíèé ôðîíò
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CPU_INT32U cr=T3CR0;
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if (((cr-period) > COIN_IMP_MIN_LEN)
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&& ((cr-period) < COIN_IMP_MAX_LEN))
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CoinImpCounter++;
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}
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else
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{// ïðèøåë ïåðåäíèé ôðîíò
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period = T3CR0;
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}
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}
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}
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extern CPU_INT32U BSP_CPU_PclkFreq (CPU_INT08U pclk);
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/*
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P0.23 MK_P9 IMPULSE OUTPUT (èìïóëüñíûé âûõîä ìîíåòîïðèåìíèêà) -> P0.25 MK_P7
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P0.24 MK_P8 INHIBIT (áëîêèðîâêà)
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*/
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// èíèöèàëèçàöèÿ èìïóëüñíîãî âõîäà
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// èñïîëüçóåòñÿ CAP3.0
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void InitImpInput (void)
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{
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#define INPUT_CAPTURE_FREQ 100000 // ÷àñòîòà òàêòèðîâàíèÿ ÷àñòîòíûõ âõîäîâ
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CPU_INT32U pclk_freq;
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CPU_INT32U rld_cnts;
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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PCONP_bit.PCTIM3 = 1;
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PCLKSEL1_bit.PCLK_TIMER3 = 2;
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PINSEL1_bit.P0_25 = 0x3;
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PINMODE1_bit.P0_25 = 0;
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FIO0DIR_bit.P0_25 = 0;
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FIO0MASK_bit.P0_25 = 0;
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// inhibit
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PINSEL1_bit.P0_24 = 0x0;
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PINMODE1_bit.P0_24 = 0;
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FIO0DIR_bit.P0_24 = 1;
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FIO0MASK_bit.P0_24 = 0;
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FIO0SET_bit.P0_24 = 1;
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pclk_freq = BSP_CPU_PclkFreq(23);
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rld_cnts = pclk_freq / INPUT_CAPTURE_FREQ;
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T3CTCR_bit.CTM = 0;
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T3CTCR_bit.CIS = 0; // select CAP3.0 input
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T3PR = rld_cnts-1;
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T3MCR = 0;
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T3CCR = 0x07;
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T3EMR = 0;
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T3TCR = 0x03;
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T3TCR = 0x01;
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VICINTSELECT &= ~(1 << VIC_TIMER3);
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VICVECTADDR27 = (CPU_INT32U)InputCapture_ISR;
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VICVECTPRIORITY27 = 10;
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VICINTENABLE = (1 << VIC_TIMER3);
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T3IR = 0xFF;
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OS_EXIT_CRITICAL();
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}
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