mirror of
https://github.com/dimoniche/solarium.vlad.git
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334 lines
11 KiB
C
334 lines
11 KiB
C
/*
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*********************************************************************************************************
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* uC/TCP-IP
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* The Embedded TCP/IP Suite
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*
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* (c) Copyright 2003-2006; Micrium, Inc.; Weston, FL
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*
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* All rights reserved. Protected by international copyright laws.
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*
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* uC/TCP-IP is provided in source form for FREE evaluation, for educational
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* use or peaceful research. If you plan on using uC/TCP-IP in a commercial
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* product you need to contact Micrium to properly license its use in your
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* product. We provide ALL the source code for your convenience and to help
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* you experience uC/TCP-IP. The fact that the source code is provided does
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* NOT mean that you can use it without paying a licensing fee.
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*
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* Network Interface Card (NIC) port files provided, as is, for FREE and do
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* NOT require any additional licensing or licensing fee.
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*
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* Knowledge of the source code may NOT be used to develop a similar product.
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*
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* Please help us continue to provide the Embedded community with the finest
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* software available. Your honesty is greatly appreciated.
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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*
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* NETWORK PHYSICAL LAYER
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*
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* National DP83848
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*
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* Filename : net_phy.c
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* Version : V1.89
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* Programmer(s) : EHS
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*********************************************************************************************************
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* Note(s) : (1) Supports National Semiconductor DP83848 10/100 PHY
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*
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* (2) The MII interface port is assumed to be part of the host EMAC; consequently,
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* reads from and writes to the PHY are made through the EMAC. The functions
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* NetNIC_PhyRegRd() and NetNIC_PhyRegWr(), which are used to access the PHY, should
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* be provided in the EMAC driver.
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* INCLUDE FILES
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*********************************************************************************************************
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*/
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#include <net.h>
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#include <net_phy.h>
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#include <net_phy_def.h>
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/*
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*********************************************************************************************************
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*********************************************************************************************************
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* GLOBAL FUNCTIONS
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*********************************************************************************************************
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*********************************************************************************************************
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*/
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/*
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*********************************************************************************************************
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* NetNIC_PhyInit()
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*
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* Description : Initialize phyter (ethernet link controller)
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*
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* Argument(s) : none.
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*
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* Return(s) : 1 for OK, 0 for error
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*
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* Caller(s) : EMAC_Init()
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*
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* Note(s) : Assumes the MDI port as already been enabled for the PHY.
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*********************************************************************************************************
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*/
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void NetNIC_PhyInit (NET_ERR *perr)
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{
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CPU_INT32U reg_val;
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CPU_INT16U i;
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CPU_INT16U oui_msb;
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CPU_INT16U oui_lsb;
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NetNIC_PhyRegWr(EMAC_CFG_PHY_ADDR, MII_BMCR, BMCR_RESET, perr); /* Reset the PHY */
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i = DP83848_INIT_RESET_RETRIES;
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, MII_BMCR, perr) & BMCR_RESET;
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while (reg_val == BMCR_RESET && i > 0) {
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NetBSP_DlyMs(200); /* Delay while reset completes */
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, MII_BMCR, perr) & BMCR_RESET; /* Read the control register */
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i--;
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}
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if (i == 0) { /* If reset has not completed and no retries remain */
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*perr = NET_PHY_ERR_RESET_TIMEOUT; /* Return a reset timeout error */
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return;
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}
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oui_msb = (DP83848_OUI >> 6) & 0xFFFF;
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oui_lsb = (DP83848_OUI & 0x3F) << 10;
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, MII_PHYSID1, perr); /* Read the PHY ID, ensure the PHY has reset */
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if (reg_val != oui_msb) {
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*perr = NET_PHY_ERR_RESET_TIMEOUT; /* Return an error if the PHY is not properly reset */
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return;
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}
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, MII_PHYSID2, perr); /* Read the PHY ID, ensure the PHY has reset */
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if ((reg_val & 0xFC00) != oui_lsb) {
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*perr = NET_PHY_ERR_RESET_TIMEOUT; /* Return an error if the PHY is not properly reset */
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return;
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}
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NetNIC_PhyAutoNeg(); /* Attempt Auto-Negotiation */
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NetNIC_ConnStatus = NetNIC_PhyLinkState(); /* Set NetNIC_ConnStatus according to link state */
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if (NetNIC_ConnStatus == DEF_ON) {
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NetNIC_LinkUp();
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} else {
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NetNIC_LinkDown();
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}
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}
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/*
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*********************************************************************************************************
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* NetNIC_PhyAutoNeg()
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*
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* Description : Do link auto-negotiation
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*
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* Argument(s) : none.
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*
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* Return(s) : 1 = no error, 0 = error
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*
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* Caller(s) : NetNIC_PhyInit.
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*
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* Note(s) : none.
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*********************************************************************************************************
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*/
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void NetNIC_PhyAutoNeg (void)
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{
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CPU_BOOLEAN link_state;
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CPU_INT16U i;
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NET_ERR err;
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NetNIC_PhyRegWr(EMAC_CFG_PHY_ADDR, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART, &err); /* Restart Auto-Negotiation */
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i = DP83848_INIT_AUTO_NEG_RETRIES;
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link_state = NetNIC_PhyAutoNegState();
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while ((link_state != DEF_ON) && (i > 0)) {
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NetBSP_DlyMs(1500);
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link_state = NetNIC_PhyAutoNegState();
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i--;
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}
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}
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/*
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*********************************************************************************************************
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* NetNIC_PhyAutoNegState()
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*
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* Description : Returns state of auto-negotiation
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*
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* Argument(s) : none.
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*
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* Return(s) : State of auto-negociation (DEF_OFF = not completed, DEF_ON = completed).
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*
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* Caller(s) : NetNIC_PhyInit().
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*
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* Note(s) : If any error is encountered while reading the PHY, this function
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* will return Auto Negotiation State = DEF_OFF (incomplete).
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*********************************************************************************************************
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*/
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CPU_BOOLEAN NetNIC_PhyAutoNegState (void)
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{
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CPU_INT32U reg_val;
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NET_ERR err;
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, MII_BMSR, &err);
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if (err != NET_PHY_ERR_NONE) {
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reg_val = 0;
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}
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if ((reg_val & BMSR_ANEGCOMPLETE) == BMSR_ANEGCOMPLETE) {
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return (DEF_ON);
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} else {
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return (DEF_OFF);
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}
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}
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/*
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*********************************************************************************************************
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* NetNIC_PhyLinkState()
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*
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* Description : Returns state of ethernet link
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*
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* Argument(s) : none.
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*
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* Return(s) : State of ethernet link (DEF_OFF = link down, DEF_ON = link up).
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*
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* Note(s) : If any error is encountered while reading the PHY, this function
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* will return link state = DEF_OFF.
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*********************************************************************************************************
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*/
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CPU_BOOLEAN NetNIC_PhyLinkState (void)
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{
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NET_ERR err;
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CPU_INT16U reg_val;
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, MII_BMSR, &err);
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if (err == NET_PHY_ERR_NONE) {
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if ((reg_val & BMSR_LSTATUS) != 0) {
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return (DEF_ON);
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} else {
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return (DEF_OFF);
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}
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} else {
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return (DEF_OFF);
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}
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}
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/*
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*********************************************************************************************************
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* NetPHY_GetLinkSpeed()
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*
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* Description : Returns the speed of the current Ethernet link
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*
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* Argument(s) : none.
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*
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* Return(s) : 0 = No Link, 10 = 10mbps, 100 = 100mbps
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*
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* Caller(s) : EMAC_Init()
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*
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* Note(s) : none.
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*********************************************************************************************************
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*/
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CPU_INT32U NetNIC_PhyLinkSpeed (void)
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{
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NET_ERR err;
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CPU_INT16U reg_val;
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if (NetNIC_PhyLinkState() == DEF_OFF) {
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return (NET_PHY_SPD_0);
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} else {
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, DP83848_PHYSTS, &err);
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if (err == NET_PHY_ERR_NONE) {
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if ((reg_val & PHYSTS_SPEED_STATUS) != 0) {
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return (NET_PHY_SPD_10);
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} else {
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return (NET_PHY_SPD_100);
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}
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} else {
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return (NET_PHY_SPD_0);
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}
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}
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}
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/*
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*********************************************************************************************************
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* NetPHY_GetDuplex()
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*
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* Description : Returns the duplex mode of the current Ethernet link
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*
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* Argument(s) : none.
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*
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* Return(s) : 0 = Unknown (Auto-Neg in progress), 1 = Half Duplex, 2 = Full Duplex
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*
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* Caller(s) : EMAC_Init()
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*
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* Note(s) : none.
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*********************************************************************************************************
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*/
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CPU_INT32U NetNIC_PhyLinkDuplex (void)
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{
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CPU_INT16U reg_val;
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NET_ERR err;
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if (NetNIC_PhyLinkState() == DEF_OFF) {
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return (NET_PHY_DUPLEX_UNKNOWN);
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} else {
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reg_val = NetNIC_PhyRegRd(EMAC_CFG_PHY_ADDR, DP83848_PHYSTS, &err);
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if (err == NET_PHY_ERR_NONE) {
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if ((reg_val & PHYSTS_DUPLEX_STATUS) != 0) {
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return (NET_PHY_DUPLEX_FULL);
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} else {
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return (NET_PHY_DUPLEX_HALF);
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}
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} else {
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return (NET_PHY_DUPLEX_UNKNOWN);
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}
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}
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}
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