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230 lines
11 KiB
C
230 lines
11 KiB
C
/*
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*********************************************************************************************************
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* uC/OS-II
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* The Real-Time Kernel
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*
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*
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* (c) Copyright 1992-2007, Micrium, Weston, FL
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* All Rights Reserved
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*
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* Generic ARM Port
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*
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* File : OS_CPU.H
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* Version : V1.82
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* By : Jean J. Labrosse
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* Jean-Denis Hatier
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*
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* For : ARM7 or ARM9
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* Mode : ARM or Thumb
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* Toolchain : IAR's EWARM V4.11a and higher
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*********************************************************************************************************
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*/
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#ifndef OS_CPU_H
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#define OS_CPU_H
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#ifdef OS_CPU_GLOBALS
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#define OS_CPU_EXT
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#else
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#define OS_CPU_EXT extern
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#endif
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#ifndef OS_CPU_FPU_EN
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#define OS_CPU_FPU_EN 0 /* HW floating point support disabled by default */
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#endif
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/*
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*********************************************************************************************************
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* INTERRUPT DISABLE TIME MEASUREMENT
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*********************************************************************************************************
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*/
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#define OS_CPU_INT_DIS_MEAS_EN 0
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/*
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*********************************************************************************************************
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* EXCEPTION DEFINES
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*********************************************************************************************************
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*/
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/* ARM exception IDs */
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#define OS_CPU_ARM_EXCEPT_RESET 0x00
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#define OS_CPU_ARM_EXCEPT_UNDEF_INSTR 0x01
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#define OS_CPU_ARM_EXCEPT_SWI 0x02
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#define OS_CPU_ARM_EXCEPT_PREFETCH_ABORT 0x03
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#define OS_CPU_ARM_EXCEPT_DATA_ABORT 0x04
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#define OS_CPU_ARM_EXCEPT_ADDR_ABORT 0x05
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#define OS_CPU_ARM_EXCEPT_IRQ 0x06
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#define OS_CPU_ARM_EXCEPT_FIQ 0x07
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#define OS_CPU_ARM_EXCEPT_NBR 0x08
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/* ARM exception vectors addresses */
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#define OS_CPU_ARM_EXCEPT_RESET_VECT_ADDR (OS_CPU_ARM_EXCEPT_RESET * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_UNDEF_INSTR_VECT_ADDR (OS_CPU_ARM_EXCEPT_UNDEF_INSTR * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_SWI_VECT_ADDR (OS_CPU_ARM_EXCEPT_SWI * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_PREFETCH_ABORT_VECT_ADDR (OS_CPU_ARM_EXCEPT_PREFETCH_ABORT * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_DATA_ABORT_VECT_ADDR (OS_CPU_ARM_EXCEPT_DATA_ABORT * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_ADDR_ABORT_VECT_ADDR (OS_CPU_ARM_EXCEPT_ADDR_ABORT * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_IRQ_VECT_ADDR (OS_CPU_ARM_EXCEPT_IRQ * 0x04 + 0x00)
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#define OS_CPU_ARM_EXCEPT_FIQ_VECT_ADDR (OS_CPU_ARM_EXCEPT_FIQ * 0x04 + 0x00)
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/* ARM exception handlers addresses */
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#define OS_CPU_ARM_EXCEPT_RESET_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_RESET * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_UNDEF_INSTR_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_UNDEF_INSTR * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_SWI_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_SWI * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_PREFETCH_ABORT_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_PREFETCH_ABORT * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_DATA_ABORT_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_DATA_ABORT * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_ADDR_ABORT_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_ADDR_ABORT * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_IRQ_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_IRQ * 0x04 + 0x20)
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#define OS_CPU_ARM_EXCEPT_FIQ_HANDLER_ADDR (OS_CPU_ARM_EXCEPT_FIQ * 0x04 + 0x20)
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/* ARM "Jump To Self" assembled instruction */
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#define OS_CPU_ARM_INSTR_JUMP_TO_SELF 0xEAFFFFFE
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/* ARM "Jump To Exception Handler" assembled instruction*/
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#define OS_CPU_ARM_INSTR_JUMP_TO_HANDLER 0xE59FF018
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/*
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*********************************************************************************************************
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* DATA TYPES
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* (Compiler Specific)
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*********************************************************************************************************
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*/
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typedef unsigned char BOOLEAN;
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typedef unsigned char INT8U; /* Unsigned 8 bit quantity */
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typedef signed char INT8S; /* Signed 8 bit quantity */
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typedef unsigned short INT16U; /* Unsigned 16 bit quantity */
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typedef signed short INT16S; /* Signed 16 bit quantity */
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typedef unsigned int INT32U; /* Unsigned 32 bit quantity */
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typedef signed int INT32S; /* Signed 32 bit quantity */
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typedef float FP32; /* Single precision floating point */
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typedef double FP64; /* Double precision floating point */
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typedef unsigned int OS_STK; /* Each stack entry is 32-bit wide */
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typedef unsigned int OS_CPU_SR; /* Define size of CPU status register (PSR = 32 bits) */
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/*
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*********************************************************************************************************
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* ARM
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*
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* Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts
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* will be enabled even if they were disabled before entering the critical section.
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* NOT IMPLEMENTED
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*
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* Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if
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* interrupts were disabled before entering the critical section, they will be disabled when
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* leaving the critical section.
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* NOT IMPLEMENTED
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*
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* Method #3: Disable/Enable interrupts by preserving the state of interrupts. Generally speaking you
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* would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
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* disable interrupts. 'cpu_sr' is allocated in all of uC/OS-II's functions that need to
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* disable interrupts. You would restore the interrupt disable state by copying back 'cpu_sr'
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* into the CPU's status register.
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*********************************************************************************************************
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*/
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#define OS_CRITICAL_METHOD 3
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#if OS_CRITICAL_METHOD == 3
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#if OS_CPU_INT_DIS_MEAS_EN > 0
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#define OS_ENTER_CRITICAL() {cpu_sr = OS_CPU_SR_Save(); \
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OS_CPU_IntDisMeasStart();}
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#define OS_EXIT_CRITICAL() {OS_CPU_IntDisMeasStop(); \
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OS_CPU_SR_Restore(cpu_sr);}
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#else
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#define OS_ENTER_CRITICAL() {cpu_sr = OS_CPU_SR_Save();}
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#define OS_EXIT_CRITICAL() {OS_CPU_SR_Restore(cpu_sr);}
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#endif
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#endif
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/*
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*********************************************************************************************************
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* ARM Miscellaneous
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*********************************************************************************************************
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*/
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#define OS_STK_GROWTH 1 /* Stack grows from HIGH to LOW memory on ARM */
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#define OS_TASK_SW() OSCtxSw()
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/*
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*********************************************************************************************************
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* GLOBAL VARIABLES
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*********************************************************************************************************
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*/
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/* Variables used to measure interrupt disable time */
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#if OS_CPU_INT_DIS_MEAS_EN > 0
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OS_CPU_EXT INT16U OS_CPU_IntDisMeasNestingCtr;
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OS_CPU_EXT INT16U OS_CPU_IntDisMeasCntsEnter;
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OS_CPU_EXT INT16U OS_CPU_IntDisMeasCntsExit;
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OS_CPU_EXT INT16U OS_CPU_IntDisMeasCntsMax;
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OS_CPU_EXT INT16U OS_CPU_IntDisMeasCntsDelta;
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OS_CPU_EXT INT16U OS_CPU_IntDisMeasCntsOvrhd;
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#endif
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/*
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*********************************************************************************************************
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* PROTOTYPES
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*********************************************************************************************************
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*/
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#if OS_CRITICAL_METHOD == 3
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__arm OS_CPU_SR OS_CPU_SR_Save(void); /* See OS_CPU_A.ASM */
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__arm void OS_CPU_SR_Restore(OS_CPU_SR cpu_sr);
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#endif
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__arm void OS_CPU_SR_INT_Dis(void);
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__arm void OS_CPU_SR_INT_En(void);
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__arm void OS_CPU_SR_FIQ_Dis(void);
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__arm void OS_CPU_SR_FIQ_En(void);
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__arm void OS_CPU_SR_IRQ_Dis(void);
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__arm void OS_CPU_SR_IRQ_En(void);
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#if OS_CPU_FPU_EN > 0
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void OS_CPU_FP_Init(void); /* See OS_CPU_C.C */
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__arm void OS_CPU_FP_Restore(void *pblk);
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__arm void OS_CPU_FP_Save(void *pblk);
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#endif
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__arm void OSCtxSw(void);
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__arm void OSIntCtxSw(void);
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__arm void OSStartHighRdy(void);
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void OS_CPU_InitExceptVect(void);
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__arm void OS_CPU_ARM_ExceptResetHndlr(void);
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__arm void OS_CPU_ARM_ExceptUndefInstrHndlr(void);
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__arm void OS_CPU_ARM_ExceptSwiHndlr(void);
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__arm void OS_CPU_ARM_ExceptPrefetchAbortHndlr(void);
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__arm void OS_CPU_ARM_ExceptDataAbortHndlr(void);
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__arm void OS_CPU_ARM_ExceptAddrAbortHndlr(void);
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__arm void OS_CPU_ARM_ExceptIrqHndlr(void);
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__arm void OS_CPU_ARM_ExceptFiqHndlr(void);
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void OS_CPU_ExceptHndlr(INT32U except_type);
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#if OS_CPU_INT_DIS_MEAS_EN > 0
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void OS_CPU_IntDisMeasInit(void);
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void OS_CPU_IntDisMeasStart(void);
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void OS_CPU_IntDisMeasStop(void);
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INT16U OS_CPU_IntDisMeasTmrRd(void);
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#endif
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#if OS_CPU_ARM_DCC_EN > 0
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void OSDCC_Handler(void);
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#endif
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#endif
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