mirror of
https://github.com/dimoniche/Moyka.git
synced 2026-01-30 01:43:30 +03:00
802 lines
17 KiB
C
802 lines
17 KiB
C
#include "iolpc2368.h"
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#include "ucos_ii.h"
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#include "cpu.h"
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#include "app_serv.h"
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#include "coin.h"
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#include "data.h"
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#include "datadesc.h"
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#include <stdlib.h>
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OS_STK CoinTaskStk[COIN_TASK_STK_SIZE];
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void InitImpInput(void);
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CPU_INT32U CoinImpCounter[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U CashImpCounter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U cash_pulse[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U cash_pause[COUNT_POST + COUNT_VACUUM];
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static char pend_cash_counter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U pend_cash_timestamp[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U signal_pulse[COUNT_POST + COUNT_VACUUM];
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static char pend_signal_counter[COUNT_POST + COUNT_VACUUM];
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void SetCashPulseParam(CPU_INT32U pulse, CPU_INT32U pause, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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cash_pulse[post] = pulse * 10;
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cash_pause[post] = pause;
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OS_EXIT_CRITICAL();
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}
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void SetSignalPulseParam(CPU_INT32U pulse, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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signal_pulse[post] = pulse * 200;
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OS_EXIT_CRITICAL();
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}
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void CoinTask(void *p_arg)
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{
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CPU_INT32U enable_coin[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U cash_enable[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U enable_signal[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U last_cash_count[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U last_cash_time[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U last_settings_time = 0;
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while(1)
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{
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if (OSTimeGet() - last_settings_time > 1000)
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{
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for(int i = 0; i < COUNT_POST + COUNT_VACUUM; i++)
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{
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GetData(&EnableCoinDesc, &enable_coin[i], i, DATA_FLAG_DIRECT_INDEX);
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GetData(&EnableValidatorDesc, &cash_enable[i], i, DATA_FLAG_DIRECT_INDEX);
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GetData(&EnableSignalDesc, &enable_signal[i], i, DATA_FLAG_DIRECT_INDEX);
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}
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last_settings_time = OSTimeGet();
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}
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for(int i = 0; i < COUNT_POST + COUNT_VACUUM; i++)
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{
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OSTimeDly(1);
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if (enable_coin[i])
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{
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if (GetCoinCount(i))
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{
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PostUserEvent(EVENT_COIN_INSERTED_POST1 + i);
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}
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}
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else
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{
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CoinDisable();
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GetResetCoinCount(i);
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}
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if (enable_signal[i])
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{
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if (pend_signal_counter[i])
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{
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// <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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PostUserEvent(EVENT_CASH_PRINT_CHECK_POST1 + i);
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}
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}
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if (!cash_enable[i]) {GetResetCashCount(i); continue;}
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if(i >= COUNT_POST) continue;
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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if (pend_cash_counter[i])
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{
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (OSTimeGet() - pend_cash_timestamp[i] > cash_pause[i])
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{
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pend_cash_counter[i] = 0;
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CashImpCounter[i]++;
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}
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}
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OS_EXIT_CRITICAL();
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if (GetCashCount(i))
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{
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if (last_cash_count[i] == GetCashCount(i))
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{
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if (labs(OSTimeGet() - last_cash_time[i]) > 500)
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{
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PostUserEvent(EVENT_CASH_INSERTED_POST1 + i);
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}
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}
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else
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{
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last_cash_count[i] = GetCashCount(i);
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last_cash_time[i] = OSTimeGet();
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}
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}
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else
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{
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last_cash_time[i] = OSTimeGet();
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}
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}
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}
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}
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void CoinDisable(void)
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{
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}
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void CoinEnable(void)
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{
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetCoinCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CoinImpCounter[index];
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetResetCoinCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CoinImpCounter[index];
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CoinImpCounter[index] = 0;
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetCashCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CashImpCounter[index];
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetResetCashCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CashImpCounter[index];
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CashImpCounter[index] = 0;
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OS_EXIT_CRITICAL();
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return ctr;
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}
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CPU_INT32U period[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U period_cash[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U period_signal[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U T3CR = 0;
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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void InitCoin(void)
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{
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for(int i = 0; i < COUNT_POST + COUNT_VACUUM; i++)
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{
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CoinImpCounter[i] = 0;
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CashImpCounter[i] = 0;
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cash_pulse[i] = 0;
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cash_pause[i] = 0;
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pend_cash_counter[i] = 0;
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pend_cash_timestamp[i] = 0;
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signal_pulse[i] = 0;
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pend_signal_counter[i] = 0;
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period[i] = 0;
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period_cash[i] = 0;
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period_signal[i] = 0;
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}
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InitImpInput();
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OSTaskCreate(CoinTask, (void *)0, (OS_STK *)&CoinTaskStk[COIN_TASK_STK_SIZE-1], COIN_TASK_PRIO);
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}
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void InputCapture_ISR(void)
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{
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T3IR = 0xFF;
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
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T3CR++;
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// <20><><EFBFBD><EFBFBD> 1
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
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if (!FIO1PIN_bit.P1_20)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U cr=T3CR;
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cr -= period_cash[0];
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if ((cr > (cash_pulse[0] - COIN_IMP_SPAN))
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&& (cr < (cash_pulse[0] + COIN_IMP_SPAN)))
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{
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pend_cash_counter[0] = 1;
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pend_cash_timestamp[0] = OSTimeGet();
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period_cash[0] = T3CR;
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pend_cash_counter[0] = 0;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
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if (!FIO1PIN_bit.P1_21)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (((T3CR-period[0]) > COIN_IMP_MIN_LEN)
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&& ((T3CR-period[0]) < COIN_IMP_MAX_LEN))
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{
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CoinImpCounter[0]++;
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period[0] = T3CR;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 1
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if (!FIO4PIN_bit.P4_28)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U cr=T3CR;
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cr -= period_signal[0];
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if ((cr > (signal_pulse[0] - COIN_IMP_SPAN))
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&& (cr < (signal_pulse[0] + COIN_IMP_SPAN)))
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{
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pend_signal_counter[0] = 1;
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period_signal[0] = T3CR;
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pend_signal_counter[0] = 0;
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}
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// <20><><EFBFBD><EFBFBD> 2
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
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if (!FIO1PIN_bit.P1_19)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U cr=T3CR;
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cr -= period_cash[1];
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if ((cr > (cash_pulse[1] - COIN_IMP_SPAN))
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&& (cr < (cash_pulse[1] + COIN_IMP_SPAN)))
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{
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pend_cash_counter[1] = 1;
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pend_cash_timestamp[1] = OSTimeGet();
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period_cash[1] = T3CR;
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pend_cash_counter[1] = 0;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
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if (!FIO1PIN_bit.P1_18)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (((T3CR-period[1]) > COIN_IMP_MIN_LEN)
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&& ((T3CR-period[1]) < COIN_IMP_MAX_LEN))
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{
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CoinImpCounter[1]++;
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period[1] = T3CR;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 2
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if (!FIO0PIN_bit.P0_4)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U cr=T3CR;
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cr -= period_signal[1];
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if ((cr > (signal_pulse[1] - COIN_IMP_SPAN))
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&& (cr < (signal_pulse[1] + COIN_IMP_SPAN)))
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{
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pend_signal_counter[0] = 1;
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period_signal[1] = T3CR;
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pend_signal_counter[1] = 0;
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}
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// <20><><EFBFBD><EFBFBD> 3
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
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if (!FIO3PIN_bit.P3_25)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U cr=T3CR;
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cr -= period_cash[2];
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if ((cr > (cash_pulse[2] - COIN_IMP_SPAN))
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&& (cr < (cash_pulse[2] + COIN_IMP_SPAN)))
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{
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pend_cash_counter[2] = 1;
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pend_cash_timestamp[2] = OSTimeGet();
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period_cash[2] = T3CR;
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pend_cash_counter[2] = 0;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
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if (!FIO3PIN_bit.P3_26)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (((T3CR-period[2]) > COIN_IMP_MIN_LEN)
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&& ((T3CR-period[2]) < COIN_IMP_MAX_LEN))
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{
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CoinImpCounter[2]++;
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period[2] = T3CR;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 3
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if (!FIO1PIN_bit.P1_28)
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U cr=T3CR;
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cr -= period_signal[2];
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if ((cr > (signal_pulse[2] - COIN_IMP_SPAN))
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&& (cr < (signal_pulse[2] + COIN_IMP_SPAN)))
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{
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pend_signal_counter[2] = 1;
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}
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}
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else
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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period_signal[2] = T3CR;
|
||
pend_signal_counter[2] = 0;
|
||
}
|
||
|
||
|
||
// <20><><EFBFBD><EFBFBD> 4
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
if (!FIO0PIN_bit.P0_26)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[3];
|
||
|
||
if ((cr > (cash_pulse[3] - COIN_IMP_SPAN))
|
||
&& (cr < (cash_pulse[3] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_cash_counter[3] = 1;
|
||
pend_cash_timestamp[3] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[3] = T3CR;
|
||
pend_cash_counter[3] = 0;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
if (!FIO0PIN_bit.P0_25)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
if (((T3CR-period[3]) > COIN_IMP_MIN_LEN)
|
||
&& ((T3CR-period[3]) < COIN_IMP_MAX_LEN))
|
||
{
|
||
CoinImpCounter[3]++;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[3] = T3CR;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 4
|
||
if (!FIO1PIN_bit.P1_27)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_signal[3];
|
||
|
||
if ((cr > (signal_pulse[3] - COIN_IMP_SPAN))
|
||
&& (cr < (signal_pulse[3] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_signal_counter[3] = 1;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_signal[3] = T3CR;
|
||
pend_signal_counter[3] = 0;
|
||
}
|
||
|
||
|
||
// <20><><EFBFBD><EFBFBD> 5
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
if (!FIO0PIN_bit.P0_9)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[4];
|
||
|
||
if ((cr > (cash_pulse[4] - COIN_IMP_SPAN))
|
||
&& (cr < (cash_pulse[4] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_cash_counter[4] = 1;
|
||
pend_cash_timestamp[4] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[4] = T3CR;
|
||
pend_cash_counter[4] = 0;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
if (!FIO2PIN_bit.P2_2)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
if (((T3CR-period[4]) > COIN_IMP_MIN_LEN)
|
||
&& ((T3CR-period[4]) < COIN_IMP_MAX_LEN))
|
||
{
|
||
CoinImpCounter[4]++;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[4] = T3CR;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 5
|
||
if (!FIO1PIN_bit.P1_26)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_signal[4];
|
||
|
||
if ((cr > (signal_pulse[4] - COIN_IMP_SPAN))
|
||
&& (cr < (signal_pulse[4] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_signal_counter[4] = 1;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_signal[4] = T3CR;
|
||
pend_signal_counter[4] = 0;
|
||
}
|
||
|
||
|
||
// <20><><EFBFBD><EFBFBD> 6
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
if (!FIO0PIN_bit.P0_7)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[5];
|
||
|
||
if ((cr > (cash_pulse[5] - COIN_IMP_SPAN))
|
||
&& (cr < (cash_pulse[5] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_cash_counter[5] = 1;
|
||
pend_cash_timestamp[5] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[5] = T3CR;
|
||
pend_cash_counter[5] = 0;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
if (!FIO0PIN_bit.P0_8)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
if (((T3CR-period[5]) > COIN_IMP_MIN_LEN)
|
||
&& ((T3CR-period[5]) < COIN_IMP_MAX_LEN))
|
||
{
|
||
CoinImpCounter[5]++;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[5] = T3CR;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 5
|
||
if (!FIO0PIN_bit.P0_0)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_signal[5];
|
||
|
||
if ((cr > (signal_pulse[5] - COIN_IMP_SPAN))
|
||
&& (cr < (signal_pulse[5] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_signal_counter[5] = 1;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_signal[5] = T3CR;
|
||
pend_signal_counter[5] = 0;
|
||
}
|
||
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
if (!FIO0PIN_bit.P0_5)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
if (((T3CR-period[6]) > COIN_IMP_MIN_LEN)
|
||
&& ((T3CR-period[6]) < COIN_IMP_MAX_LEN))
|
||
{
|
||
CoinImpCounter[6]++;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[6] = T3CR;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
if (!FIO0PIN_bit.P0_6)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_signal[6];
|
||
|
||
if ((cr > (signal_pulse[6] - COIN_IMP_SPAN))
|
||
&& (cr < (signal_pulse[6] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_signal_counter[6] = 1;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_signal[6] = T3CR;
|
||
pend_signal_counter[6] = 0;
|
||
}
|
||
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
if (!FIO1PIN_bit.P1_25)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
if (((T3CR-period[7]) > COIN_IMP_MIN_LEN)
|
||
&& ((T3CR-period[7]) < COIN_IMP_MAX_LEN))
|
||
{
|
||
CoinImpCounter[7]++;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[7] = T3CR;
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
if (!FIO0PIN_bit.P0_10)
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_signal[7];
|
||
|
||
if ((cr > (signal_pulse[7] - COIN_IMP_SPAN))
|
||
&& (cr < (signal_pulse[7] + COIN_IMP_SPAN)))
|
||
{
|
||
pend_signal_counter[7] = 1;
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_signal[7] = T3CR;
|
||
pend_signal_counter[7] = 0;
|
||
}
|
||
|
||
}
|
||
|
||
extern CPU_INT32U BSP_CPU_PclkFreq (CPU_INT08U pclk);
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
void InitImpInput (void)
|
||
{
|
||
#define INPUT_CAPTURE_FREQ 10000 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
|
||
CPU_INT32U pclk_freq;
|
||
CPU_INT32U rld_cnts;
|
||
|
||
#if OS_CRITICAL_METHOD == 3
|
||
OS_CPU_SR cpu_sr = 0;
|
||
#endif
|
||
|
||
OnChangeCashPulseLen();
|
||
OnChangeSinalPulseLen();
|
||
|
||
OS_ENTER_CRITICAL();
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL3_bit.P1_20 = 0;
|
||
PINMODE3_bit.P1_20 = 0;
|
||
FIO1DIR_bit.P1_20 = 0;
|
||
FIO1MASK_bit.P1_20 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL3_bit.P1_21 = 0;
|
||
PINMODE3_bit.P1_21 = 0;
|
||
FIO1DIR_bit.P1_21 = 0;
|
||
FIO1MASK_bit.P1_21 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 1
|
||
PINSEL9_bit.P4_28 = 0;
|
||
PINMODE9_bit.P4_28 = 0;
|
||
FIO4DIR_bit.P4_28 = 0;
|
||
FIO4MASK_bit.P4_28 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL3_bit.P1_19 = 0;
|
||
PINMODE3_bit.P1_19 = 0;
|
||
FIO1DIR_bit.P1_19 = 0;
|
||
FIO1MASK_bit.P1_19 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL3_bit.P1_18 = 0;
|
||
PINMODE3_bit.P1_18 = 0;
|
||
FIO1DIR_bit.P1_18 = 0;
|
||
FIO1MASK_bit.P1_18 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 2
|
||
PINSEL0_bit.P0_4 = 0;
|
||
PINMODE0_bit.P0_4 = 0;
|
||
FIO0DIR_bit.P0_4 = 0;
|
||
FIO0MASK_bit.P0_4 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
|
||
PINSEL7_bit.P3_25 = 0;
|
||
PINMODE7_bit.P3_25 = 0;
|
||
FIO3DIR_bit.P3_25 = 0;
|
||
FIO3MASK_bit.P3_25 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
|
||
PINSEL7_bit.P3_26 = 0;
|
||
PINMODE7_bit.P3_26 = 0;
|
||
FIO3DIR_bit.P3_26 = 0;
|
||
FIO3MASK_bit.P3_26 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 3
|
||
PINSEL3_bit.P1_28 = 0;
|
||
PINMODE3_bit.P1_28 = 0;
|
||
FIO1DIR_bit.P1_28 = 0;
|
||
FIO1MASK_bit.P1_28 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
PINSEL1_bit.P0_26 = 0;
|
||
PINMODE1_bit.P0_26 = 0;
|
||
FIO0DIR_bit.P0_26 = 0;
|
||
FIO0MASK_bit.P0_26 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
PINSEL1_bit.P0_25 = 0;
|
||
PINMODE1_bit.P0_25 = 0;
|
||
FIO0DIR_bit.P0_25 = 0;
|
||
FIO0MASK_bit.P0_25 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 4
|
||
PINSEL3_bit.P1_27 = 0;
|
||
PINMODE3_bit.P1_27 = 0;
|
||
FIO1DIR_bit.P1_27 = 0;
|
||
FIO1MASK_bit.P1_27 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
PINSEL0_bit.P0_9 = 0;
|
||
PINMODE0_bit.P0_9 = 0;
|
||
FIO0DIR_bit.P0_9 = 0;
|
||
FIO0MASK_bit.P0_9 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
PINSEL4_bit.P2_2 = 0;
|
||
PINMODE4_bit.P2_2 = 0;
|
||
FIO2DIR_bit.P2_2 = 0;
|
||
FIO2MASK_bit.P2_2 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 5
|
||
PINSEL3_bit.P1_26 = 0;
|
||
PINMODE3_bit.P1_26 = 0;
|
||
FIO1DIR_bit.P1_26 = 0;
|
||
FIO1MASK_bit.P1_26 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_7 = 0;
|
||
PINMODE0_bit.P0_7 = 0;
|
||
FIO0DIR_bit.P0_7 = 0;
|
||
FIO0MASK_bit.P0_7 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_8 = 0;
|
||
PINMODE0_bit.P0_8 = 0;
|
||
FIO0DIR_bit.P0_8 = 0;
|
||
FIO0MASK_bit.P0_8 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_0 = 0;
|
||
PINMODE0_bit.P0_0 = 0;
|
||
FIO0DIR_bit.P0_0 = 0;
|
||
FIO0MASK_bit.P0_0 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL0_bit.P0_5 = 0;
|
||
PINMODE0_bit.P0_5 = 0;
|
||
FIO0DIR_bit.P0_5 = 0;
|
||
FIO0MASK_bit.P0_5 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL0_bit.P0_6 = 0;
|
||
PINMODE0_bit.P0_6 = 0;
|
||
FIO0DIR_bit.P0_6 = 0;
|
||
FIO0MASK_bit.P0_6 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL3_bit.P1_25 = 0;
|
||
PINMODE3_bit.P1_25 = 0;
|
||
FIO1DIR_bit.P1_25 = 0;
|
||
FIO1MASK_bit.P1_25 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL0_bit.P0_10 = 0;
|
||
PINMODE0_bit.P0_10 = 0;
|
||
FIO0DIR_bit.P0_10 = 0;
|
||
FIO0MASK_bit.P0_10 = 0;
|
||
|
||
PCONP_bit.PCTIM3 = 1;
|
||
PCLKSEL1_bit.PCLK_TIMER3 = 2;
|
||
|
||
pclk_freq = BSP_CPU_PclkFreq(23);
|
||
rld_cnts = pclk_freq / INPUT_CAPTURE_FREQ / 2;
|
||
|
||
T3CTCR_bit.CTM = 0;
|
||
T3CTCR_bit.CIS = 0; // select CAP3.0 input
|
||
T3PR = rld_cnts-1;
|
||
|
||
T3MR0 = 1;
|
||
T3MCR = 3;
|
||
|
||
T3CCR = 0x00;
|
||
T3EMR = 0;
|
||
T3TCR = 0x03;
|
||
T3TCR = 0x01;
|
||
|
||
VICINTSELECT &= ~(1 << VIC_TIMER3);
|
||
VICVECTADDR27 = (CPU_INT32U)InputCapture_ISR;
|
||
VICVECTPRIORITY27 = 10;
|
||
VICINTENABLE = (1 << VIC_TIMER3);
|
||
|
||
T3IR = 0xFF;
|
||
|
||
OS_EXIT_CRITICAL();
|
||
}
|
||
|