mirror of
https://github.com/dimoniche/Moyka.git
synced 2026-01-30 09:53:31 +03:00
1282 lines
30 KiB
C
1282 lines
30 KiB
C
#include "iolpc2368.h"
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#include "ucos_ii.h"
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#include "cpu.h"
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#include "app_serv.h"
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#include "coin.h"
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#include "data.h"
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#include "datadesc.h"
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#include <stdlib.h>
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OS_STK CoinTaskStk[COIN_TASK_STK_SIZE];
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void InitImpInput(void);
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CPU_INT32U CoinImpCounter[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U CashImpCounter[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U BankImpCounter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U coin_pulse[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U coin_pause[COUNT_POST + COUNT_VACUUM];
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static char pend_coin_counter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U pend_coin_timestamp[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U cash_pulse[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U cash_pause[COUNT_POST + COUNT_VACUUM];
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static char pend_cash_counter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U pend_cash_timestamp[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U bank_pulse[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U bank_pause[COUNT_POST + COUNT_VACUUM];
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static char pend_bank_counter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U pend_bank_timestamp[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U signal_pulse[COUNT_POST + COUNT_VACUUM];
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static char pend_upsignal_counter[COUNT_POST + COUNT_VACUUM];
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static char pend_downsignal_counter[COUNT_POST + COUNT_VACUUM];
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static CPU_INT32U pend_signal_timestamp[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U cashLevel[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U coinLevel[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U SignalLevel[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U bankLevel[COUNT_POST + COUNT_VACUUM];
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void SetCashPulseParam(CPU_INT32U pulse, CPU_INT32U pause, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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coin_pulse[post] = pulse * 1;
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coin_pause[post] = pause;
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OS_EXIT_CRITICAL();
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}
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void SetCoinPulseParam(CPU_INT32U pulse, CPU_INT32U pause, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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cash_pulse[post] = pulse * 1;
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cash_pause[post] = pause;
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OS_EXIT_CRITICAL();
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}
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void SetBankPulseParam(CPU_INT32U pulse, CPU_INT32U pause, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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bank_pulse[post] = pulse * 1;
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bank_pause[post] = pause;
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OS_EXIT_CRITICAL();
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}
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void SetSignalPulseParam(CPU_INT32U pulse, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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signal_pulse[post] = pulse * 1000;
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OS_EXIT_CRITICAL();
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}
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void SetLevelParam(CPU_INT32U level1, CPU_INT32U level2, CPU_INT32U level3, CPU_INT32U level4, CPU_INT32U post)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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if(post < COUNT_POST)
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{
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cashLevel[post] = level1;
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bankLevel[post] = level2;
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SignalLevel[post] = level3;
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}
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coinLevel[post] = level4;
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OS_EXIT_CRITICAL();
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}
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void CoinTask(void *p_arg)
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{
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CPU_INT32U enable_coin[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U cash_enable[COUNT_POST];
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CPU_INT32U enable_signal[COUNT_POST];
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CPU_INT32U bank_enable[COUNT_POST];
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CPU_INT32U last_coin_count[COUNT_POST];
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CPU_INT32U last_coin_time[COUNT_POST];
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CPU_INT32U last_cash_count[COUNT_POST];
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CPU_INT32U last_cash_time[COUNT_POST];
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CPU_INT32U last_bank_count[COUNT_POST];
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CPU_INT32U last_bank_time[COUNT_POST];
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CPU_INT32U last_settings_time = 0;
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while(1)
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{
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if (OSTimeGet() - last_settings_time > 1000)
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{
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for(int i = 0; i < COUNT_POST + COUNT_VACUUM; i++)
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{
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GetData(&EnableCoinDesc, &enable_coin[i], i, DATA_FLAG_DIRECT_INDEX);
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if(i < COUNT_POST)
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{
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GetData(&EnableValidatorDesc, &cash_enable[i], i, DATA_FLAG_DIRECT_INDEX);
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GetData(&EnableSignalDesc, &enable_signal[i], i, DATA_FLAG_DIRECT_INDEX);
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GetData(&EnableBankDesc, &bank_enable[i], i, DATA_FLAG_DIRECT_INDEX);
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}
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}
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last_settings_time = OSTimeGet();
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}
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OSTimeDly(1);
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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for(int i = 0; i < COUNT_POST + COUNT_VACUUM; i++)
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{
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if (enable_coin[i])
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{
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OS_ENTER_CRITICAL();
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if (pend_coin_counter[i])
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{
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (OSTimeGet() - pend_coin_timestamp[i] > coin_pause[i])
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{
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pend_coin_counter[i] = 0;
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CoinImpCounter[i]++;
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}
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}
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OS_EXIT_CRITICAL();
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if (GetCoinCount(i))
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{
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if (last_coin_count[i] == GetCoinCount(i))
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{
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if (labs(OSTimeGet() - last_coin_time[i]) > 500)
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{
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PostUserEvent(EVENT_COIN_INSERTED_POST1 + i);
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}
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}
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else
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{
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last_coin_count[i] = GetCoinCount(i);
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last_coin_time[i] = OSTimeGet();
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}
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}
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else
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{
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last_coin_time[i] = OSTimeGet();
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}
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}
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else
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{
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CoinDisable();
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GetResetCoinCount(i);
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}
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if(i >= COUNT_POST) continue;
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 8 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
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OS_ENTER_CRITICAL();
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if (enable_signal[i])
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{
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if (pend_upsignal_counter[i])
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{
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if (OSTimeGet() - pend_signal_timestamp[i] > signal_pulse[i])
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{
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// <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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PostUserEvent(EVENT_WAIT_CASH_PRINT_CHECK_POST1 + i);
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pend_upsignal_counter[i] = 0;
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}
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}
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if (pend_downsignal_counter[i])
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{
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if (OSTimeGet() - pend_signal_timestamp[i] > signal_pulse[i])
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{
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// <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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PostUserEvent(EVENT_STOP_MONEY_POST1 + i);
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pend_downsignal_counter[i] = 0;
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}
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}
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}
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OS_EXIT_CRITICAL();
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if (bank_enable[i])
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{
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OS_ENTER_CRITICAL();
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if (pend_bank_counter[i])
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{
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (OSTimeGet() - pend_bank_timestamp[i] > bank_pause[i])
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{
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pend_bank_counter[i] = 0;
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BankImpCounter[i]++;
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}
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}
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OS_EXIT_CRITICAL();
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if (GetbankCount(i))
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{
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if (last_bank_count[i] == GetbankCount(i))
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{
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if (labs(OSTimeGet() - last_bank_time[i]) > 500)
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{
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PostUserEvent(EVENT_BANK_INSERTED_POST1 + i);
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}
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}
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else
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{
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last_bank_count[i] = GetbankCount(i);
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last_bank_time[i] = OSTimeGet();
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}
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}
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else
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{
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last_bank_time[i] = OSTimeGet();
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}
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}
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else
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{
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GetResetbankCount(i);
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}
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if (!cash_enable[i]) {GetResetCashCount(i); continue;}
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OS_ENTER_CRITICAL();
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if (pend_cash_counter[i])
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{
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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if (OSTimeGet() - pend_cash_timestamp[i] > cash_pause[i])
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{
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pend_cash_counter[i] = 0;
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CashImpCounter[i]++;
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}
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}
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OS_EXIT_CRITICAL();
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if (GetCashCount(i))
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{
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if (last_cash_count[i] == GetCashCount(i))
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{
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if (labs(OSTimeGet() - last_cash_time[i]) > 1000)
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{
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PostUserEvent(EVENT_CASH_INSERTED_POST1 + i);
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}
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}
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else
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{
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last_cash_count[i] = GetCashCount(i);
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last_cash_time[i] = OSTimeGet();
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}
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}
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else
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{
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last_cash_time[i] = OSTimeGet();
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}
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}
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}
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}
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void CoinDisable(void)
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{
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}
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void CoinEnable(void)
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{
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetCoinCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CoinImpCounter[index];
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetResetCoinCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CoinImpCounter[index];
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CoinImpCounter[index] = 0;
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetCashCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CashImpCounter[index];
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetResetCashCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = CashImpCounter[index];
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CashImpCounter[index] = 0;
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetbankCount(int index)
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{
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
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#endif
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = BankImpCounter[index];
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OS_EXIT_CRITICAL();
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return ctr;
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}
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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CPU_INT32U GetResetbankCount(int index)
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{
|
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#if OS_CRITICAL_METHOD == 3
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OS_CPU_SR cpu_sr = 0;
|
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#endif
|
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OS_ENTER_CRITICAL();
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CPU_INT32U ctr = BankImpCounter[index];
|
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BankImpCounter[index] = 0;
|
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OS_EXIT_CRITICAL();
|
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return ctr;
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}
|
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CPU_INT32U period[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U period_cash[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U period_bank[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U period_signal[COUNT_POST + COUNT_VACUUM];
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CPU_INT32U T3CR = 0;
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|
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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void InitCoin(void)
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{
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for(int i = 0; i < COUNT_POST + COUNT_VACUUM; i++)
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{
|
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CoinImpCounter[i] = 0;
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CashImpCounter[i] = 0;
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BankImpCounter[i] = 0;
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cash_pulse[i] = 50;
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cash_pause[i] = 50;
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pend_cash_counter[i] = 0;
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pend_cash_timestamp[i] = 0;
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bank_pulse[i] = 50;
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bank_pause[i] = 50;
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pend_bank_counter[i] = 0;
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pend_bank_timestamp[i] = 0;
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signal_pulse[i] = 1000;
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pend_upsignal_counter[i] = 0;
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pend_downsignal_counter[i] = 0;
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pend_signal_timestamp[i] = 0;
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period[i] = 0;
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period_cash[i] = 0;
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period_bank[i] = 0;
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period_signal[i] = 0;
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}
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|
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InitImpInput();
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OSTaskCreate(CoinTask, (void *)0, (OS_STK *)&CoinTaskStk[COIN_TASK_STK_SIZE-1], COIN_TASK_PRIO);
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}
|
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CPU_INT32U input_register()
|
||
{
|
||
CPU_INT32U input = 0;
|
||
|
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if (FIO1PIN_bit.P1_20)
|
||
{
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SETBIT(input, 0);
|
||
}
|
||
if (FIO1PIN_bit.P1_21)
|
||
{
|
||
SETBIT(input, 1);
|
||
}
|
||
if (FIO4PIN_bit.P4_28)
|
||
{
|
||
SETBIT(input, 2);
|
||
}
|
||
if (FIO1PIN_bit.P1_19)
|
||
{
|
||
SETBIT(input, 3);
|
||
}
|
||
if (FIO1PIN_bit.P1_18)
|
||
{
|
||
SETBIT(input, 4);
|
||
}
|
||
if (FIO0PIN_bit.P0_4)
|
||
{
|
||
SETBIT(input, 5);
|
||
}
|
||
if (FIO3PIN_bit.P3_25)
|
||
{
|
||
SETBIT(input, 6);
|
||
}
|
||
if (FIO3PIN_bit.P3_26)
|
||
{
|
||
SETBIT(input, 7);
|
||
}
|
||
if (FIO1PIN_bit.P1_28)
|
||
{
|
||
SETBIT(input, 8);
|
||
}
|
||
if (FIO0PIN_bit.P0_26)
|
||
{
|
||
SETBIT(input, 9);
|
||
}
|
||
if (FIO0PIN_bit.P0_25)
|
||
{
|
||
SETBIT(input, 10);
|
||
}
|
||
if (FIO1PIN_bit.P1_27)
|
||
{
|
||
SETBIT(input, 11);
|
||
}
|
||
if (FIO0PIN_bit.P0_9)
|
||
{
|
||
SETBIT(input, 12);
|
||
}
|
||
if (FIO2PIN_bit.P2_2)
|
||
{
|
||
SETBIT(input, 13);
|
||
}
|
||
if (FIO1PIN_bit.P1_26)
|
||
{
|
||
SETBIT(input, 14);
|
||
}
|
||
if (FIO0PIN_bit.P0_7)
|
||
{
|
||
SETBIT(input, 15);
|
||
}
|
||
if (FIO0PIN_bit.P0_8)
|
||
{
|
||
SETBIT(input, 16);
|
||
}
|
||
if (FIO0PIN_bit.P0_0)
|
||
{
|
||
SETBIT(input, 17);
|
||
}
|
||
if (FIO0PIN_bit.P0_5)
|
||
{
|
||
SETBIT(input, 18);
|
||
}
|
||
if (FIO1PIN_bit.P1_25)
|
||
{
|
||
SETBIT(input, 19);
|
||
}
|
||
if (FIO0PIN_bit.P0_28)
|
||
{
|
||
SETBIT(input, 20);
|
||
}
|
||
if (FIO0PIN_bit.P0_27)
|
||
{
|
||
SETBIT(input, 21);
|
||
}
|
||
if (FIO1PIN_bit.P1_24)
|
||
{
|
||
SETBIT(input, 22);
|
||
}
|
||
if (FIO1PIN_bit.P1_23)
|
||
{
|
||
SETBIT(input, 23);
|
||
}
|
||
if (FIO0PIN_bit.P0_6)
|
||
{
|
||
SETBIT(input, 24);
|
||
}
|
||
if (FIO0PIN_bit.P0_10)
|
||
{
|
||
SETBIT(input, 25);
|
||
}
|
||
|
||
return input;
|
||
}
|
||
|
||
CPU_INT32U input_event = 0;
|
||
CPU_INT32U prev_input = 0;
|
||
CPU_INT32U curr_input = 0;
|
||
|
||
void InputCapture_ISR(void)
|
||
{
|
||
T3IR = 0xFF;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||
T3CR++;
|
||
|
||
curr_input = input_register();
|
||
input_event = curr_input^prev_input;
|
||
prev_input = curr_input;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 1
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
if(TSTBIT(input_event, 0))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_20 && cashLevel[0]) || (FIO1PIN_bit.P1_20 && !cashLevel[0]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[0];
|
||
|
||
if (cr > (cash_pulse[0] - COIN_IMP_SPAN))
|
||
{
|
||
pend_cash_counter[0] = 1;
|
||
pend_cash_timestamp[0] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[0] = T3CR;
|
||
pend_cash_counter[0] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
if(TSTBIT(input_event, 1))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_21 && coinLevel[0]) || (FIO1PIN_bit.P1_21 && !coinLevel[0]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[0];
|
||
|
||
if (cr > (coin_pulse[0] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[0] = 1;
|
||
pend_coin_timestamp[0] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[0] = T3CR;
|
||
pend_coin_counter[0] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 1
|
||
if(TSTBIT(input_event, 2))
|
||
{
|
||
pend_signal_timestamp[0] = OSTimeGet();
|
||
|
||
if ((FIO4PIN_bit.P4_28 && SignalLevel[0]) || (!FIO4PIN_bit.P4_28 && !SignalLevel[0]))
|
||
{
|
||
pend_upsignal_counter[0] = 1;
|
||
pend_downsignal_counter[0] = 0;
|
||
}
|
||
else
|
||
{
|
||
pend_upsignal_counter[0] = 0;
|
||
pend_downsignal_counter[0] = 1;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 2
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
if(TSTBIT(input_event, 3))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_19 && cashLevel[1]) || (FIO1PIN_bit.P1_19 && !cashLevel[1]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[1];
|
||
|
||
if (cr > (cash_pulse[1] - COIN_IMP_SPAN))
|
||
{
|
||
pend_cash_counter[1] = 1;
|
||
pend_cash_timestamp[1] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[1] = T3CR;
|
||
pend_cash_counter[1] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
if(TSTBIT(input_event, 4))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_18 && coinLevel[1]) || (FIO1PIN_bit.P1_18 && !coinLevel[1]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[1];
|
||
|
||
if (cr > (coin_pulse[1] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[1] = 1;
|
||
pend_coin_timestamp[1] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[1] = T3CR;
|
||
pend_coin_counter[1] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 2
|
||
if(TSTBIT(input_event, 5))
|
||
{
|
||
pend_signal_timestamp[1] = OSTimeGet();
|
||
|
||
if ((FIO0PIN_bit.P0_4 && SignalLevel[1]) || (!FIO0PIN_bit.P0_4 && !SignalLevel[1]))
|
||
{
|
||
pend_upsignal_counter[1] = 1;
|
||
pend_downsignal_counter[1] = 0;
|
||
}
|
||
else
|
||
{
|
||
pend_upsignal_counter[1] = 0;
|
||
pend_downsignal_counter[1] = 1;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 3
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
|
||
if(TSTBIT(input_event, 6))
|
||
{
|
||
if ((!FIO3PIN_bit.P3_25 && cashLevel[2]) || (FIO3PIN_bit.P3_25 && !cashLevel[2]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[2];
|
||
|
||
if (cr > (cash_pulse[2] - COIN_IMP_SPAN))
|
||
{
|
||
pend_cash_counter[2] = 1;
|
||
pend_cash_timestamp[2] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[2] = T3CR;
|
||
pend_cash_counter[2] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
|
||
if(TSTBIT(input_event, 7))
|
||
{
|
||
if ((!FIO3PIN_bit.P3_26 && coinLevel[2]) || (FIO3PIN_bit.P3_26 && !coinLevel[2]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[2];
|
||
|
||
if (cr > (coin_pulse[2] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[2] = 1;
|
||
pend_coin_timestamp[2] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[2] = T3CR;
|
||
pend_coin_counter[2] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 3
|
||
if(TSTBIT(input_event, 8))
|
||
{
|
||
pend_signal_timestamp[2] = OSTimeGet();
|
||
|
||
if ((FIO1PIN_bit.P1_28 && SignalLevel[2]) || (!FIO1PIN_bit.P1_28 && !SignalLevel[2]))
|
||
{
|
||
pend_upsignal_counter[2] = 1;
|
||
pend_downsignal_counter[2] = 0;
|
||
}
|
||
else
|
||
{
|
||
pend_upsignal_counter[2] = 0;
|
||
pend_downsignal_counter[2] = 1;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 4
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
if(TSTBIT(input_event, 9))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_26 && cashLevel[3]) || (FIO0PIN_bit.P0_26 && !cashLevel[3]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[3];
|
||
|
||
if (cr > (cash_pulse[3] - COIN_IMP_SPAN))
|
||
{
|
||
pend_cash_counter[3] = 1;
|
||
pend_cash_timestamp[3] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[3] = T3CR;
|
||
pend_cash_counter[3] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
if(TSTBIT(input_event, 10))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_25 && coinLevel[3]) || (FIO0PIN_bit.P0_25 && !coinLevel[3]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[3];
|
||
|
||
if (cr > (coin_pulse[3] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[3] = 1;
|
||
pend_coin_timestamp[3] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[3] = T3CR;
|
||
pend_coin_counter[3] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 4
|
||
if(TSTBIT(input_event, 11))
|
||
{
|
||
pend_signal_timestamp[3] = OSTimeGet();
|
||
|
||
if ((FIO1PIN_bit.P1_27 && SignalLevel[2]) || (!FIO1PIN_bit.P1_27 && !SignalLevel[3]))
|
||
{
|
||
pend_upsignal_counter[3] = 1;
|
||
pend_downsignal_counter[3] = 0;
|
||
}
|
||
else
|
||
{
|
||
pend_upsignal_counter[3] = 0;
|
||
pend_downsignal_counter[3] = 1;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 5
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
if(TSTBIT(input_event, 12))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_9 && cashLevel[4]) || (FIO0PIN_bit.P0_9 && !cashLevel[4]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[4];
|
||
|
||
if (cr > (cash_pulse[4] - COIN_IMP_SPAN))
|
||
{
|
||
pend_cash_counter[4] = 1;
|
||
pend_cash_timestamp[4] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[4] = T3CR;
|
||
pend_cash_counter[4] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
if(TSTBIT(input_event, 13))
|
||
{
|
||
if ((!FIO2PIN_bit.P2_2 && coinLevel[4]) || (FIO2PIN_bit.P2_2 && !coinLevel[4]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[4];
|
||
|
||
if (cr > (coin_pulse[4] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[4] = 1;
|
||
pend_coin_timestamp[4] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[4] = T3CR;
|
||
pend_coin_counter[4] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 5
|
||
if(TSTBIT(input_event, 14))
|
||
{
|
||
pend_signal_timestamp[4] = OSTimeGet();
|
||
|
||
if ((FIO1PIN_bit.P1_26 && SignalLevel[4]) || (!FIO1PIN_bit.P1_26 && !SignalLevel[4]))
|
||
{
|
||
pend_upsignal_counter[4] = 1;
|
||
pend_downsignal_counter[4] = 0;
|
||
}
|
||
else
|
||
{
|
||
pend_upsignal_counter[4] = 0;
|
||
pend_downsignal_counter[4] = 1;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 6
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
if(TSTBIT(input_event, 15))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_7 && cashLevel[5]) || (FIO0PIN_bit.P0_7 && !cashLevel[5]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_cash[5];
|
||
|
||
if (cr > (cash_pulse[5] - COIN_IMP_SPAN))
|
||
{
|
||
pend_cash_counter[5] = 1;
|
||
pend_cash_timestamp[5] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_cash[5] = T3CR;
|
||
pend_cash_counter[5] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
if(TSTBIT(input_event, 16))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_8 && coinLevel[5]) || (FIO0PIN_bit.P0_8 && !coinLevel[5]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[5];
|
||
|
||
if (cr > (coin_pulse[5] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[5] = 1;
|
||
pend_coin_timestamp[5] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[5] = T3CR;
|
||
pend_coin_counter[5] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 6
|
||
if(TSTBIT(input_event, 17))
|
||
{
|
||
pend_signal_timestamp[5] = OSTimeGet();
|
||
|
||
if ((FIO0PIN_bit.P0_0 && SignalLevel[5]) || (!FIO0PIN_bit.P0_0 && !SignalLevel[5]))
|
||
{
|
||
pend_upsignal_counter[5] = 1;
|
||
pend_downsignal_counter[5] = 0;
|
||
}
|
||
else
|
||
{
|
||
pend_upsignal_counter[5] = 0;
|
||
pend_downsignal_counter[5] = 1;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
if(TSTBIT(input_event, 18))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_5 && coinLevel[6]) || (FIO0PIN_bit.P0_5 && !coinLevel[6]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[6];
|
||
|
||
if (cr > (coin_pulse[6] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[6] = 1;
|
||
pend_coin_timestamp[6] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[6] = T3CR;
|
||
pend_coin_counter[6] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
if(TSTBIT(input_event, 19))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_25 && coinLevel[7]) || (FIO1PIN_bit.P1_25 && !coinLevel[7]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period[7];
|
||
|
||
if (cr > (coin_pulse[7] - COIN_IMP_SPAN))
|
||
{
|
||
pend_coin_counter[7] = 1;
|
||
pend_coin_timestamp[7] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period[7] = T3CR;
|
||
pend_coin_counter[7] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 1
|
||
if(TSTBIT(input_event, 20))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_28 && bankLevel[0]) || (FIO0PIN_bit.P0_28 && !bankLevel[0]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_bank[0];
|
||
|
||
if (cr > (bank_pulse[0] - COIN_IMP_SPAN))
|
||
{
|
||
pend_bank_counter[0] = 1;
|
||
pend_bank_timestamp[0] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_bank[0] = T3CR;
|
||
pend_bank_counter[0] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 2
|
||
if(TSTBIT(input_event, 21))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_27 && bankLevel[1]) || (FIO0PIN_bit.P0_27 && !bankLevel[1]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_bank[1];
|
||
|
||
if (cr > (bank_pulse[1] - COIN_IMP_SPAN))
|
||
{
|
||
pend_bank_counter[1] = 1;
|
||
pend_bank_timestamp[1] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_bank[1] = T3CR;
|
||
pend_bank_counter[1] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 3
|
||
if(TSTBIT(input_event, 22))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_24 && bankLevel[2]) || (FIO1PIN_bit.P1_24 && !bankLevel[2]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_bank[2];
|
||
|
||
if (cr > (bank_pulse[2] - COIN_IMP_SPAN))
|
||
{
|
||
pend_bank_counter[2] = 1;
|
||
pend_bank_timestamp[2] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_bank[2] = T3CR;
|
||
pend_bank_counter[2] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 4
|
||
if(TSTBIT(input_event, 23))
|
||
{
|
||
if ((!FIO1PIN_bit.P1_23 && bankLevel[3]) || (FIO1PIN_bit.P1_23 && !bankLevel[3]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_bank[3];
|
||
|
||
if (cr > (bank_pulse[3] - COIN_IMP_SPAN))
|
||
{
|
||
pend_bank_counter[3] = 1;
|
||
pend_bank_timestamp[3] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_bank[3] = T3CR;
|
||
pend_bank_counter[3] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 5
|
||
if(TSTBIT(input_event, 24))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_6 && bankLevel[4]) || (FIO0PIN_bit.P0_6 && !bankLevel[4]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_bank[4];
|
||
|
||
if (cr > (bank_pulse[4] - COIN_IMP_SPAN))
|
||
{
|
||
pend_bank_counter[4] = 1;
|
||
pend_bank_timestamp[4] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_bank[4] = T3CR;
|
||
pend_bank_counter[4] = 0;
|
||
}
|
||
}
|
||
|
||
// <20><><EFBFBD><EFBFBD> 6
|
||
if(TSTBIT(input_event, 25))
|
||
{
|
||
if ((!FIO0PIN_bit.P0_10 && bankLevel[5]) || (FIO0PIN_bit.P0_10 && !bankLevel[5]))
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
CPU_INT32U cr=T3CR;
|
||
cr -= period_bank[5];
|
||
|
||
if (cr > (bank_pulse[5] - COIN_IMP_SPAN))
|
||
{
|
||
pend_bank_counter[5] = 1;
|
||
pend_bank_timestamp[5] = OSTimeGet();
|
||
}
|
||
}
|
||
else
|
||
{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
period_bank[5] = T3CR;
|
||
pend_bank_counter[5] = 0;
|
||
}
|
||
}
|
||
}
|
||
|
||
extern CPU_INT32U BSP_CPU_PclkFreq (CPU_INT08U pclk);
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
void InitImpInput (void)
|
||
{
|
||
#define INPUT_CAPTURE_FREQ 1000 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
|
||
CPU_INT32U pclk_freq;
|
||
CPU_INT32U rld_cnts;
|
||
|
||
#if OS_CRITICAL_METHOD == 3
|
||
OS_CPU_SR cpu_sr = 0;
|
||
#endif
|
||
|
||
OnChangeCashPulseLen();
|
||
OnChangeSinalPulseLen();
|
||
OnChangeLevel();
|
||
|
||
OS_ENTER_CRITICAL();
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL3_bit.P1_20 = 0;
|
||
PINMODE3_bit.P1_20 = 0;
|
||
FIO1DIR_bit.P1_20 = 0;
|
||
FIO1MASK_bit.P1_20 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL3_bit.P1_21 = 0;
|
||
PINMODE3_bit.P1_21 = 0;
|
||
FIO1DIR_bit.P1_21 = 0;
|
||
FIO1MASK_bit.P1_21 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 1
|
||
PINSEL9_bit.P4_28 = 0;
|
||
PINMODE9_bit.P4_28 = 0;
|
||
FIO4DIR_bit.P4_28 = 0;
|
||
FIO4MASK_bit.P4_28 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL3_bit.P1_19 = 0;
|
||
PINMODE3_bit.P1_19 = 0;
|
||
FIO1DIR_bit.P1_19 = 0;
|
||
FIO1MASK_bit.P1_19 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL3_bit.P1_18 = 0;
|
||
PINMODE3_bit.P1_18 = 0;
|
||
FIO1DIR_bit.P1_18 = 0;
|
||
FIO1MASK_bit.P1_18 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 2
|
||
PINSEL0_bit.P0_4 = 0;
|
||
PINMODE0_bit.P0_4 = 0;
|
||
FIO0DIR_bit.P0_4 = 0;
|
||
FIO0MASK_bit.P0_4 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
|
||
PINSEL7_bit.P3_25 = 0;
|
||
PINMODE7_bit.P3_25 = 0;
|
||
FIO3DIR_bit.P3_25 = 0;
|
||
FIO3MASK_bit.P3_25 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3
|
||
PINSEL7_bit.P3_26 = 0;
|
||
PINMODE7_bit.P3_26 = 0;
|
||
FIO3DIR_bit.P3_26 = 0;
|
||
FIO3MASK_bit.P3_26 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 3
|
||
PINSEL3_bit.P1_28 = 0;
|
||
PINMODE3_bit.P1_28 = 0;
|
||
FIO1DIR_bit.P1_28 = 0;
|
||
FIO1MASK_bit.P1_28 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
PINSEL1_bit.P0_26 = 0;
|
||
PINMODE1_bit.P0_26 = 0;
|
||
FIO0DIR_bit.P0_26 = 0;
|
||
FIO0MASK_bit.P0_26 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4
|
||
PINSEL1_bit.P0_25 = 0;
|
||
PINMODE1_bit.P0_25 = 0;
|
||
FIO0DIR_bit.P0_25 = 0;
|
||
FIO0MASK_bit.P0_25 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 4
|
||
PINSEL3_bit.P1_27 = 0;
|
||
PINMODE3_bit.P1_27 = 0;
|
||
FIO1DIR_bit.P1_27 = 0;
|
||
FIO1MASK_bit.P1_27 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
PINSEL0_bit.P0_9 = 0;
|
||
PINMODE0_bit.P0_9 = 0;
|
||
FIO0DIR_bit.P0_9 = 0;
|
||
FIO0MASK_bit.P0_9 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 5
|
||
PINSEL4_bit.P2_2 = 0;
|
||
PINMODE4_bit.P2_2 = 0;
|
||
FIO2DIR_bit.P2_2 = 0;
|
||
FIO2MASK_bit.P2_2 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 5
|
||
PINSEL3_bit.P1_26 = 0;
|
||
PINMODE3_bit.P1_26 = 0;
|
||
FIO1DIR_bit.P1_26 = 0;
|
||
FIO1MASK_bit.P1_26 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_7 = 0;
|
||
PINMODE0_bit.P0_7 = 0;
|
||
FIO0DIR_bit.P0_7 = 0;
|
||
FIO0MASK_bit.P0_7 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_8 = 0;
|
||
PINMODE0_bit.P0_8 = 0;
|
||
FIO0DIR_bit.P0_8 = 0;
|
||
FIO0MASK_bit.P0_8 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_0 = 0;
|
||
PINMODE0_bit.P0_0 = 0;
|
||
FIO0DIR_bit.P0_0 = 0;
|
||
FIO0MASK_bit.P0_0 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||
PINSEL0_bit.P0_5 = 0;
|
||
PINMODE0_bit.P0_5 = 0;
|
||
FIO0DIR_bit.P0_5 = 0;
|
||
FIO0MASK_bit.P0_5 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2
|
||
PINSEL3_bit.P1_25 = 0;
|
||
PINMODE3_bit.P1_25 = 0;
|
||
FIO1DIR_bit.P1_25 = 0;
|
||
FIO1MASK_bit.P1_25 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 1
|
||
PINSEL1_bit.P0_28 = 0;
|
||
PINMODE1_bit.P0_28 = 0;
|
||
FIO0DIR_bit.P0_28 = 0;
|
||
FIO0MASK_bit.P0_28 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 2
|
||
PINSEL1_bit.P0_27 = 0;
|
||
PINMODE1_bit.P0_27 = 0;
|
||
FIO0DIR_bit.P0_27 = 0;
|
||
FIO0MASK_bit.P0_27 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 3
|
||
PINSEL3_bit.P1_24 = 0;
|
||
PINMODE3_bit.P1_24 = 0;
|
||
FIO1DIR_bit.P1_24 = 0;
|
||
FIO1MASK_bit.P1_24 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 4
|
||
PINSEL3_bit.P1_23 = 0;
|
||
PINMODE3_bit.P1_23 = 0;
|
||
FIO1DIR_bit.P1_23 = 0;
|
||
FIO1MASK_bit.P1_23 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 5
|
||
PINSEL0_bit.P0_6 = 0;
|
||
PINMODE0_bit.P0_6 = 0;
|
||
FIO0DIR_bit.P0_6 = 0;
|
||
FIO0MASK_bit.P0_6 = 0;
|
||
|
||
// <20><><EFBFBD><EFBFBD> 6
|
||
PINSEL0_bit.P0_10 = 0;
|
||
PINMODE0_bit.P0_10 = 0;
|
||
FIO0DIR_bit.P0_10 = 0;
|
||
FIO0MASK_bit.P0_10 = 0;
|
||
|
||
PCONP_bit.PCTIM3 = 1;
|
||
PCLKSEL1_bit.PCLK_TIMER3 = 2;
|
||
|
||
pclk_freq = BSP_CPU_PclkFreq(23);
|
||
rld_cnts = pclk_freq / INPUT_CAPTURE_FREQ / 2;
|
||
|
||
T3CTCR_bit.CTM = 0;
|
||
T3CTCR_bit.CIS = 0; // select CAP3.0 input
|
||
T3PR = rld_cnts-1;
|
||
|
||
T3MR0 = 1;
|
||
T3MCR = 3;
|
||
|
||
T3CCR = 0x00;
|
||
T3EMR = 0;
|
||
T3TCR = 0x03;
|
||
T3TCR = 0x01;
|
||
|
||
VICINTSELECT &= ~(1 << VIC_TIMER3);
|
||
VICVECTADDR27 = (CPU_INT32U)InputCapture_ISR;
|
||
VICVECTPRIORITY27 = 10;
|
||
VICINTENABLE = (1 << VIC_TIMER3);
|
||
|
||
T3IR = 0xFF;
|
||
|
||
prev_input = curr_input = input_register();
|
||
|
||
OS_EXIT_CRITICAL();
|
||
}
|
||
|